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cp15 but better

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wheremyfoodat 2022-09-15 22:42:36 +03:00
parent 58fe2bcf18
commit d8cf0e2de2
5 changed files with 36 additions and 7 deletions
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7
src/core/CPU/cpu_dynarmic.cpp
View file

@ -2,18 +2,19 @@
#include "cpu_dynarmic.hpp"
CPU::CPU(Memory& mem, Kernel& kernel) : mem(mem), env(mem, kernel) {
Dynarmic::A32::UserConfig config;
cp15 = std::make_shared<CP15>();
Dynarmic::A32::UserConfig config;
config.callbacks = &env;
config.coprocessors[15] = std::make_shared<CP15>();
config.coprocessors[15] = cp15;
jit = std::make_unique<Dynarmic::A32::Jit>(config);
}
void CPU::reset() {
// ARM mode, all flags disabled, interrupts and aborts all enabled, user mode
setCPSR(0x00000010);
cp15->reset();
jit->Reset();
jit->ClearCache();
jit->Regs().fill(0);

19
src/core/memory.cpp
View file

@ -30,6 +30,14 @@ Memory::Memory() {
writeTable[page++] = pointer;
fcramStackPage++;
}
// Map 1 page of FCRAM for thread-local storage
u32 fcramTLSPage = fcramPageCount - 5;
page = VirtualAddrs::TLSBase / pageSize;
auto pointer = (uintptr_t)&fcram[fcramTLSPage * pageSize];
readTable[page] = pointer;
writeTable[page++] = pointer;
}
u8 Memory::read8(u32 vaddr) {
@ -53,7 +61,16 @@ u32 Memory::read32(u32 vaddr) {
}
void Memory::write8(u32 vaddr, u8 value) {
Helpers::panic("Unimplemented 8-bit write, addr: %08X, val: %02X", vaddr, value);
const u32 page = vaddr >> pageShift;
const u32 offset = vaddr & pageMask;
uintptr_t pointer = writeTable[page];
if (pointer != 0) [[likely]] {
*(u8*)(pointer + offset) = value;
}
else {
Helpers::panic("Unimplemented 8-bit write, addr: %08X, val: %02X", vaddr, value);
}
}
void Memory::write16(u32 vaddr, u16 value) {