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https://github.com/wheremyfoodat/Panda3DS.git
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[ShaderJIT] Migrate to #18
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wheremyfoodat
parent
b04ad7215b
commit
df414acc23
1 changed files with 71 additions and 72 deletions
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@ -8,8 +8,7 @@
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using namespace Xbyak;
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using namespace Xbyak::util;
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using Helpers::getBit;
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using Helpers::getBits;
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using namespace Helpers;
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// Register that points to PICA state
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static constexpr Reg64 statePointer = rbp;
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@ -59,8 +58,8 @@ void ShaderEmitter::scanForCalls(const PICAShader& shaderUnit) {
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for (u32 i = 0; i < PICAShader::maxInstructionCount; i++) {
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const u32 instruction = shaderUnit.loadedShader[i];
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if (isCall(instruction)) {
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const u32 num = instruction & 0xff; // Num of instructions to execute
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const u32 dest = (instruction >> 10) & 0xfff; // Starting subroutine address
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const u32 num = instruction & 0xff;
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const u32 dest = getBits<10, 12>(instruction);
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const u32 returnPC = num + dest; // Add them to get the return PC
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returnPCs.push_back(returnPC);
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@ -147,16 +146,16 @@ void ShaderEmitter::loadRegister(Xmm dest, const PICAShader& shader, u32 src, u3
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bool negate; // If true, negate all lanes of the register
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if constexpr (sourceIndex == 1) { // SRC1
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negate = ((operandDescriptor >> 4) & 1) != 0;
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compSwizzle = (operandDescriptor >> 5) & 0xff;
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negate = (getBit<4>(operandDescriptor)) != 0;
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compSwizzle = getBits<5, 8>(operandDescriptor);
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}
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else if constexpr (sourceIndex == 2) { // SRC2
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negate = ((operandDescriptor >> 13) & 1) != 0;
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compSwizzle = (operandDescriptor >> 14) & 0xff;
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negate = (getBit<13>(operandDescriptor)) != 0;
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compSwizzle = getBits<14, 8>(operandDescriptor);
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}
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else if constexpr (sourceIndex == 3) { // SRC3
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negate = ((operandDescriptor >> 22) & 1) != 0;
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compSwizzle = (operandDescriptor >> 23) & 0xff;
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negate = (getBit<22>(operandDescriptor)) != 0;
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compSwizzle = getBits<23, 8>(operandDescriptor);
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}
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// PICA has the swizzle descriptor inverted in comparison to x86. For the PICA, the descriptor is (lowest to highest bits) wzyx while it's xyzw for x86
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@ -230,36 +229,36 @@ void ShaderEmitter::checkCmpRegister(const PICAShader& shader, u32 instruction)
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const size_t cmpRegXOffset = uintptr_t(&shader.cmpRegister) - uintptr_t(&shader);
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const size_t cmpRegYOffset = cmpRegXOffset + sizeof(bool);
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const u32 condition = (instruction >> 22) & 3;
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const uint refY = (instruction >> 24) & 1;
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const uint refX = (instruction >> 25) & 1;
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const u32 condition = getBits<22, 2>(instruction);
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const uint refY = getBit<24>(instruction);
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const uint refX = getBit<25>(instruction);
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// refX in the bottom byte, refY in the top byte. This is done for condition codes 0 and 1 which check both x and y, so we can emit a single instruction that checks both
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const u16 refX_refY_merged = refX | (refY << 8);
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switch (condition) {
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case 0: // Either cmp register matches
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// Z flag is 0 if at least 1 of them is set
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test(word[statePointer + cmpRegXOffset], refX_refY_merged);
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case 0: // Either cmp register matches
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// Z flag is 0 if at least 1 of them is set
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test(word[statePointer + cmpRegXOffset], refX_refY_merged);
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// Invert z flag
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setz(al);
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test(al, al);
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break;
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case 1: // Both cmp registers match
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cmp(word[statePointer + cmpRegXOffset], refX_refY_merged);
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break;
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case 2: // At least cmp.x matches
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cmp(byte[statePointer + cmpRegXOffset], refX);
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break;
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default: // At least cmp.y matches
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cmp(byte[statePointer + cmpRegYOffset], refY);
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break;
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// Invert z flag
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setz(al);
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test(al, al);
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break;
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case 1: // Both cmp registers match
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cmp(word[statePointer + cmpRegXOffset], refX_refY_merged);
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break;
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case 2: // At least cmp.x matches
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cmp(byte[statePointer + cmpRegXOffset], refX);
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break;
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default: // At least cmp.y matches
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cmp(byte[statePointer + cmpRegYOffset], refY);
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break;
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}
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}
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void ShaderEmitter::checkBoolUniform(const PICAShader& shader, u32 instruction) {
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const u32 bit = (instruction >> 22) & 0xf; // Bit of the bool uniform to check
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const u32 bit = getBits<22, 4>(instruction); // Bit of the bool uniform to check
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const uintptr_t boolUniformOffset = uintptr_t(&shader.boolUniform) - uintptr_t(&shader);
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test(word[statePointer + boolUniformOffset], 1 << bit);
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@ -279,9 +278,9 @@ void ShaderEmitter::recEND(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recMOV(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x7f];
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u32 src = (instruction >> 12) & 0x7f;
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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const u32 src = getBits<12, 7>(instruction);
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const u32 idx = getBits<19, 2>(instruction);
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const u32 dest = getBits<21, 5>(instruction);
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loadRegister<1>(src1_xmm, shader, src, idx, operandDescriptor); // Load source 1 into scratch1
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storeRegister(src1_xmm, shader, dest, operandDescriptor);
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@ -289,10 +288,10 @@ void ShaderEmitter::recMOV(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recADD(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x7f];
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u32 src1 = (instruction >> 12) & 0x7f;
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const u32 src2 = (instruction >> 7) & 0x1f; // src2 coming first because PICA moment
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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const u32 src1 = getBits<12, 7>(instruction);
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const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
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const u32 idx = getBits<19, 2>(instruction);
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const u32 dest = getBits<21, 5>(instruction);
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loadRegister<1>(src1_xmm, shader, src1, idx, operandDescriptor);
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loadRegister<2>(src2_xmm, shader, src2, 0, operandDescriptor);
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@ -302,10 +301,10 @@ void ShaderEmitter::recADD(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recDP3(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x7f];
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u32 src1 = (instruction >> 12) & 0x7f;
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const u32 src2 = (instruction >> 7) & 0x1f; // src2 coming first because PICA moment
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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const u32 src1 = getBits<12, 7>(instruction);
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const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
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const u32 idx = getBits<19, 2>(instruction);
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const u32 dest = getBits<21, 5>(instruction);
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// TODO: Safe multiplication equivalent (Multiplication is not IEEE compliant on the PICA)
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loadRegister<1>(src1_xmm, shader, src1, idx, operandDescriptor);
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@ -316,10 +315,10 @@ void ShaderEmitter::recDP3(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recDP4(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x7f];
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u32 src1 = (instruction >> 12) & 0x7f;
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const u32 src2 = (instruction >> 7) & 0x1f; // src2 coming first because PICA moment
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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const u32 src1 = getBits<12, 7>(instruction);
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const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
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const u32 idx = getBits<19, 2>(instruction);
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const u32 dest = getBits<21, 5>(instruction);
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// TODO: Safe multiplication equivalent (Multiplication is not IEEE compliant on the PICA)
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loadRegister<1>(src1_xmm, shader, src1, idx, operandDescriptor);
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@ -330,10 +329,10 @@ void ShaderEmitter::recDP4(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recMAX(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x7f];
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u32 src1 = (instruction >> 12) & 0x7f;
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const u32 src2 = (instruction >> 7) & 0x1f; // src2 coming first because PICA moment
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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const u32 src1 = getBits<12, 7>(instruction);
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const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
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const u32 idx = getBits<19, 2>(instruction);
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const u32 dest = getBits<21, 5>(instruction);
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loadRegister<1>(src1_xmm, shader, src1, idx, operandDescriptor);
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loadRegister<2>(src2_xmm, shader, src2, 0, operandDescriptor);
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@ -343,10 +342,10 @@ void ShaderEmitter::recMAX(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recMUL(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x7f];
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u32 src1 = (instruction >> 12) & 0x7f;
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const u32 src2 = (instruction >> 7) & 0x1f; // src2 coming first because PICA moment
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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const u32 src1 = getBits<12, 7>(instruction);
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const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
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const u32 idx = getBits<19, 2>(instruction);
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const u32 dest = getBits<21, 5>(instruction);
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// TODO: Safe multiplication equivalent (Multiplication is not IEEE compliant on the PICA)
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loadRegister<1>(src1_xmm, shader, src1, idx, operandDescriptor);
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@ -357,9 +356,9 @@ void ShaderEmitter::recMUL(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recRCP(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x7f];
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u32 src = (instruction >> 12) & 0x7f;
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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const u32 src = getBits<12, 7>(instruction);
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const u32 idx = getBits<19, 2>(instruction);
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const u32 dest = getBits<21, 5>(instruction);
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const u32 writeMask = operandDescriptor & 0xf;
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loadRegister<1>(src1_xmm, shader, src, idx, operandDescriptor); // Load source 1 into scratch1
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@ -376,9 +375,9 @@ void ShaderEmitter::recRCP(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recRSQ(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x7f];
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u32 src = (instruction >> 12) & 0x7f;
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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const u32 src = getBits<12, 7>(instruction);
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const u32 idx = getBits<19, 2>(instruction);
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const u32 dest = getBits<21, 5>(instruction);
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const u32 writeMask = operandDescriptor & 0xf;
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loadRegister<1>(src1_xmm, shader, src, idx, operandDescriptor); // Load source 1 into scratch1
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@ -395,11 +394,11 @@ void ShaderEmitter::recRSQ(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recMAD(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x1f];
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const u32 src1 = (instruction >> 17) & 0x1f;
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u32 src2 = (instruction >> 10) & 0x7f;
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const u32 src3 = (instruction >> 5) & 0x1f;
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const u32 idx = (instruction >> 22) & 3;
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const u32 dest = (instruction >> 24) & 0x1f;
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const u32 src1 = getBits<17, 5>(instruction);
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const u32 src2 = getBits<10, 7>(instruction);
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const u32 src3 = getBits<5, 5>(instruction);
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const u32 idx = getBits<22, 2>(instruction);
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const u32 dest = getBits<24, 5>(instruction);
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loadRegister<1>(src1_xmm, shader, src1, 0, operandDescriptor);
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loadRegister<2>(src2_xmm, shader, src2, idx, operandDescriptor);
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@ -414,11 +413,11 @@ void ShaderEmitter::recMAD(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recCMP(const PICAShader& shader, u32 instruction) {
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const u32 operandDescriptor = shader.operandDescriptors[instruction & 0x7f];
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const u32 src1 = (instruction >> 12) & 0x7f;
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const u32 src2 = (instruction >> 7) & 0x1f; // src2 coming first because PICA moment
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const u32 idx = (instruction >> 19) & 3;
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const u32 cmpY = (instruction >> 21) & 7;
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const u32 cmpX = (instruction >> 24) & 7;
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const u32 src1 = getBits<12, 7>(instruction);
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const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
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const u32 idx = getBits<19, 2>(instruction);
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const u32 cmpY = getBits<21, 3>(instruction);
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const u32 cmpX = getBits<24, 3>(instruction);
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loadRegister<1>(src1_xmm, shader, src1, idx, operandDescriptor);
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loadRegister<2>(src2_xmm, shader, src2, 0, operandDescriptor);
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@ -482,8 +481,8 @@ void ShaderEmitter::recCMP(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recIFC(const PICAShader& shader, u32 instruction) {
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// z is 1 if true, else 0
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checkCmpRegister(shader, instruction);
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const u32 dest = (instruction >> 10) & 0xfff;
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const u32 num = instruction & 0xff;
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const u32 dest = getBits<10, 12>(instruction);
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if (dest < recompilerPC) {
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Helpers::warn("Shader JIT: IFC instruction with dest < current PC\n");
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@ -507,8 +506,8 @@ void ShaderEmitter::recIFC(const PICAShader& shader, u32 instruction) {
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void ShaderEmitter::recIFU(const PICAShader& shader, u32 instruction) {
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// z is 0 if true, else 1
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checkBoolUniform(shader, instruction);
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const u32 dest = (instruction >> 10) & 0xfff;
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const u32 num = instruction & 0xff;
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const u32 dest = getBits<10, 12>(instruction);
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if (dest < recompilerPC) {
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Helpers::warn("Shader JIT: IFC instruction with dest < current PC\n");
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@ -531,8 +530,8 @@ void ShaderEmitter::recIFU(const PICAShader& shader, u32 instruction) {
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}
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void ShaderEmitter::recCALL(const PICAShader& shader, u32 instruction) {
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const u32 dest = (instruction >> 10) & 0xfff;
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const u32 num = instruction & 0xff;
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const u32 dest = getBits<10, 12>(instruction);
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// Push return PC as stack parameter. This is a decently fast solution and Citra does the same but we should probably switch to a proper PICA-like
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// Callstack, because it's not great to have an infinitely expanding call stack where popping from empty stack is undefined as hell
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