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[PICA] Implement add
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4868eebcd2
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2 changed files with 24 additions and 2 deletions
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@ -12,6 +12,7 @@ enum class ShaderType {
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namespace ShaderOpcodes {
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namespace ShaderOpcodes {
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enum : u32 {
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enum : u32 {
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ADD = 0x00,
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DP4 = 0x02,
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DP4 = 0x02,
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MOV = 0x13,
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MOV = 0x13,
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END = 0x22
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END = 0x22
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@ -37,6 +38,7 @@ class PICAShader {
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vec4f& getDest(u32 dest);
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vec4f& getDest(u32 dest);
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// Shader opcodes
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// Shader opcodes
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void add(u32 instruction);
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void dp4(u32 instruction);
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void dp4(u32 instruction);
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void mov(u32 instruction);
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void mov(u32 instruction);
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@ -8,6 +8,7 @@ void PICAShader::run() {
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const u32 opcode = instruction >> 26; // Top 6 bits are the opcode
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const u32 opcode = instruction >> 26; // Top 6 bits are the opcode
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switch (opcode) {
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switch (opcode) {
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case ShaderOpcodes::ADD: add(instruction); break;
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case ShaderOpcodes::DP4: dp4(instruction); break;
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case ShaderOpcodes::DP4: dp4(instruction); break;
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case ShaderOpcodes::END: return; // Stop running shader
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case ShaderOpcodes::END: return; // Stop running shader
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case ShaderOpcodes::MOV: mov(instruction); break;
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case ShaderOpcodes::MOV: mov(instruction); break;
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@ -36,6 +37,27 @@ PICAShader::vec4f& PICAShader::getDest(u32 dest) {
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Helpers::panic("[PICA] Unimplemented dest: %X", dest);
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Helpers::panic("[PICA] Unimplemented dest: %X", dest);
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}
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}
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void PICAShader::add(u32 instruction) {
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const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
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const u32 src1 = (instruction >> 12) & 0x7f;
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const u32 src2 = (instruction >> 7) & 0x1f; // src2 coming first because PICA moment
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const u32 idx = (instruction >> 19) & 3;
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const u32 dest = (instruction >> 21) & 0x1f;
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if (idx) Helpers::panic("[PICA] ADD: idx != 0");
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vec4f srcVec1 = getSourceSwizzled<1>(src1, operandDescriptor);
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vec4f srcVec2 = getSourceSwizzled<2>(src2, operandDescriptor);
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vec4f& destVector = getDest(dest);
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u32 componentMask = operandDescriptor & 0xf;
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for (int i = 0; i < 4; i++) {
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if (componentMask & (1 << i)) {
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destVector[3 - i] = srcVec1[3 - i] + srcVec2[3 - 1];
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}
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}
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}
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void PICAShader::mov(u32 instruction) {
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void PICAShader::mov(u32 instruction) {
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const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
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const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
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const u32 src = (instruction >> 12) & 0x7f;
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const u32 src = (instruction >> 12) & 0x7f;
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@ -46,7 +68,6 @@ void PICAShader::mov(u32 instruction) {
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vec4f srcVector = getSourceSwizzled<1>(src, operandDescriptor);
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vec4f srcVector = getSourceSwizzled<1>(src, operandDescriptor);
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vec4f& destVector = getDest(dest);
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vec4f& destVector = getDest(dest);
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// Destination component mask. Tells us which lanes of the destination register will be written to
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u32 componentMask = operandDescriptor & 0xf;
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u32 componentMask = operandDescriptor & 0xf;
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for (int i = 0; i < 4; i++) {
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for (int i = 0; i < 4; i++) {
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if (componentMask & (1 << i)) {
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if (componentMask & (1 << i)) {
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@ -69,7 +90,6 @@ void PICAShader::dp4(u32 instruction) {
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vec4f& destVector = getDest(dest);
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vec4f& destVector = getDest(dest);
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f24 dot = srcVec1[0] * srcVec2[0] + srcVec1[1] * srcVec2[1] + srcVec1[2] * srcVec2[2] + srcVec1[3] * srcVec2[3];
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f24 dot = srcVec1[0] * srcVec2[0] + srcVec1[1] * srcVec2[1] + srcVec1[2] * srcVec2[2] + srcVec1[3] * srcVec2[3];
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// Destination component mask. Tells us which lanes of the destination register will be written to
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u32 componentMask = operandDescriptor & 0xf;
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u32 componentMask = operandDescriptor & 0xf;
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for (int i = 0; i < 4; i++) {
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for (int i = 0; i < 4; i++) {
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if (componentMask & (1 << i)) {
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if (componentMask & (1 << i)) {
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