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[PICA] Add some clipping definitions

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wheremyfoodat 2023-07-04 19:51:07 +03:00
parent 0cc8d0d8a4
commit f7ad66c708
3 changed files with 14 additions and 4 deletions
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7
include/PICA/regs.hpp
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@ -10,6 +10,13 @@ namespace PICA {
ViewportHeight = 0x43,
ViewportInvh = 0x44,
// Clipping plane control
ClipEnable = 0x47,
ClipData0 = 0x48,
ClipData1 = 0x49,
ClipData2 = 0x4A,
ClipData3 = 0x4B,
DepthScale = 0x4D,
DepthOffset = 0x4E,
ShaderOutputCount = 0x4F,

5
include/opengl.hpp
View file

@ -1,5 +1,5 @@
/***************************************************************************
* Copyright (C) 2022 PCSX-Redux authors *
* Copyright (C) 2022 PCSX-Redux & Panda3DS authors *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@ -524,6 +524,9 @@ namespace OpenGL {
static void enableStencil() { glEnable(GL_STENCIL_TEST); }
static void disableStencil() { glDisable(GL_STENCIL_TEST); }
static void enableClipPlane(GLuint index) { glEnable(GL_CLIP_DISTANCE0 + index); }
static void disableClipPlane(GLuint index) { glDisable(GL_CLIP_DISTANCE0 + index); }
static void setDepthFunc(DepthFunc func) { glDepthFunc(static_cast<GLenum>(func)); }
enum Primitives {

6
src/core/PICA/regs.cpp
View file

@ -26,12 +26,12 @@ void GPU::writeReg(u32 address, u32 value) {
u32 GPU::readInternalReg(u32 index) {
using namespace PICA::InternalRegs;
if (index > regNum) {
if (index > regNum) [[unlikely]] {
Helpers::panic("Tried to read invalid GPU register. Index: %X\n", index);
return 0;
}
else if (index >= LightingLUTData0 && index <= LightingLUTData7) {
else if (index >= LightingLUTData0 && index <= LightingLUTData7) [[unlikely]] {
const uint32_t index = regs[LightingLUTIndex]; // Get full LUT index register
const uint32_t lutID = getBits<8, 5>(index); // Get which LUT we're actually writing to
uint32_t lutIndex = getBits<0, 8>(index); // And get the index inside the LUT we're writing to
@ -53,7 +53,7 @@ u32 GPU::readInternalReg(u32 index) {
void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
using namespace PICA::InternalRegs;
if (index > regNum) {
if (index > regNum) [[unlikely]] {
Helpers::panic("Tried to write to invalid GPU register. Index: %X, value: %08X\n", index, value);
return;
}