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Make DSP backends properly configurable

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wheremyfoodat 2024-02-19 17:57:21 +02:00
parent 33eb096ef8
commit 7a5bb2859e
8 changed files with 58 additions and 7 deletions
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7
include/audio/dsp_core.hpp
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@ -2,15 +2,17 @@
#include <array>
#include <functional>
#include <memory>
#include <optional>
#include <string>
#include <vector>
#include "helpers.hpp"
#include "logger.hpp"
#include "memory.hpp"
#include "scheduler.hpp"
// The DSP core must have access to the DSP service to be able to trigger interrupts properly
class DSPService;
class Memory;
namespace Audio {
// There are 160 stereo samples in 1 audio frame, so 320 samples total
@ -44,6 +46,9 @@ namespace Audio {
virtual void loadComponent(std::vector<u8>& data, u32 programMask, u32 dataMask) = 0;
virtual void unloadComponent() = 0;
virtual void setSemaphoreMask(u16 value) = 0;
static Audio::DSPCore::Type typeFromString(std::string inString);
static const char* typeToString(Audio::DSPCore::Type type);
};
std::unique_ptr<DSPCore> makeDSPCore(DSPCore::Type type, Memory& mem, Scheduler& scheduler, DSPService& dspService);

4
include/audio/null_core.hpp
View file

@ -1,6 +1,8 @@
#pragma once
#include <array>
#include "audio/dsp_core.hpp"
#include "memory.hpp"
namespace Audio {
class NullDSP : public DSPCore {
@ -27,7 +29,7 @@ namespace Audio {
u8* getDspMemory() override { return dspRam.data(); }
u16 recvData(u32 regId) override;
bool recvDataIsReady(u32 regId) override { return true; } // Treat data as always ready
bool recvDataIsReady(u32 regId) override { return true; } // Treat data as always ready
void writeProcessPipe(u32 channel, u32 size, u32 buffer) override;
std::vector<u8> readPipe(u32 channel, u32 peer, u32 size, u32 buffer) override;

7
include/audio/teakra_core.hpp
View file

@ -1,5 +1,6 @@
#pragma once
#include "audio/dsp_core.hpp"
#include "memory.hpp"
#include "swap.hpp"
#include "teakra/teakra.h"
@ -35,9 +36,9 @@ namespace Audio {
bool isFull() const { return (readPointer ^ writePointer) == wrapBit; }
bool isEmpty() const { return (readPointer ^ writePointer) == 0; }
// isWrapped: Are read and write pointers in different memory passes.
// true: xxxx]----[xxxx (data is wrapping around the end of memory)
// false: ----[xxxx]----
// isWrapped: Are read and write pointers in different memory passes.
// true: xxxx]----[xxxx (data is wrapping around the end of memory)
// false: ----[xxxx]----
bool isWrapped() const { return (readPointer ^ writePointer) >= wrapBit; }
};
static_assert(sizeof(PipeStatus) == 10, "Teakra: Pipe Status size is wrong");