mirror of
https://github.com/wheremyfoodat/Panda3DS.git
synced 2025-04-20 20:49:12 +12:00
Remove OpenGL-specific vector-types
Removes dependency on the OpenGL header and rendering backen for its `OpenGL::Vector` type in favor of a more standard array.
This commit is contained in:
Wunkolo
parent
2a1683ba62
commit
9e32b6d4bf
5 changed files with 221 additions and 224 deletions
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@ -1,11 +1,12 @@
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#include "PICA/gpu.hpp"
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#include "PICA/regs.hpp"
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#include "PICA/gpu.hpp"
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using namespace Floats;
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using namespace Helpers;
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u32 GPU::readReg(u32 address) {
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if (address >= 0x1EF01000 && address < 0x1EF01C00) { // Internal registers
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if (address >= 0x1EF01000 && address < 0x1EF01C00) { // Internal registers
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const u32 index = (address - 0x1EF01000) / sizeof(u32);
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return readInternalReg(index);
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} else {
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@ -15,7 +16,7 @@ u32 GPU::readReg(u32 address) {
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}
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void GPU::writeReg(u32 address, u32 value) {
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if (address >= 0x1EF01000 && address < 0x1EF01C00) { // Internal registers
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if (address >= 0x1EF01000 && address < 0x1EF01C00) { // Internal registers
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const u32 index = (address - 0x1EF01000) / sizeof(u32);
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writeInternalReg(index, value, 0xffffffff);
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} else {
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@ -59,7 +60,7 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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}
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u32 currentValue = regs[index];
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u32 newValue = (currentValue & ~mask) | (value & mask); // Only overwrite the bits specified by "mask"
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u32 newValue = (currentValue & ~mask) | (value & mask); // Only overwrite the bits specified by "mask"
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regs[index] = newValue;
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// TODO: Figure out if things like the shader index use the unmasked value or the masked one
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@ -74,38 +75,38 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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break;
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case AttribFormatHigh:
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totalAttribCount = (value >> 28) + 1; // Total number of vertex attributes
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fixedAttribMask = getBits<16, 12>(value); // Determines which vertex attributes are fixed for all vertices
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totalAttribCount = (value >> 28) + 1; // Total number of vertex attributes
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fixedAttribMask = getBits<16, 12>(value); // Determines which vertex attributes are fixed for all vertices
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break;
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case ColourBufferLoc: {
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u32 loc = (value & 0x0fffffff) << 3;
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renderer.setColourBufferLoc(loc);
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renderer->setColourBufferLoc(loc);
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break;
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};
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case ColourBufferFormat: {
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u32 format = getBits<16, 3>(value);
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renderer.setColourFormat(static_cast<PICA::ColorFmt>(format));
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renderer->setColourFormat(static_cast<PICA::ColorFmt>(format));
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break;
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}
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case DepthBufferLoc: {
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u32 loc = (value & 0x0fffffff) << 3;
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renderer.setDepthBufferLoc(loc);
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renderer->setDepthBufferLoc(loc);
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break;
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}
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case DepthBufferFormat: {
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u32 format = value & 0x3;
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renderer.setDepthFormat(static_cast<PICA::DepthFmt>(format));
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renderer->setDepthFormat(static_cast<PICA::DepthFmt>(format));
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break;
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}
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case FramebufferSize: {
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const u32 width = value & 0x7ff;
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const u32 height = getBits<12, 10>(value) + 1;
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renderer.setFBSize(width, height);
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renderer->setFBSize(width, height);
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break;
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}
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@ -116,7 +117,7 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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case LightingLUTData4:
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case LightingLUTData5:
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case LightingLUTData6:
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case LightingLUTData7:{
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case LightingLUTData7: {
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const uint32_t index = regs[LightingLUTIndex]; // Get full LUT index register
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const uint32_t lutID = getBits<8, 5>(index); // Get which LUT we're actually writing to
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uint32_t lutIndex = getBits<0, 8>(index); // And get the index inside the LUT we're writing to
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@ -133,15 +134,16 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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break;
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}
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case VertexFloatUniformIndex:
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shaderUnit.vs.setFloatUniformIndex(value);
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break;
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case VertexFloatUniformIndex: shaderUnit.vs.setFloatUniformIndex(value); break;
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case VertexFloatUniformData0: case VertexFloatUniformData1: case VertexFloatUniformData2:
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case VertexFloatUniformData3: case VertexFloatUniformData4: case VertexFloatUniformData5:
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case VertexFloatUniformData6: case VertexFloatUniformData7:
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shaderUnit.vs.uploadFloatUniform(value);
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break;
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case VertexFloatUniformData0:
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case VertexFloatUniformData1:
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case VertexFloatUniformData2:
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case VertexFloatUniformData3:
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case VertexFloatUniformData4:
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case VertexFloatUniformData5:
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case VertexFloatUniformData6:
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case VertexFloatUniformData7: shaderUnit.vs.uploadFloatUniform(value); break;
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case FixedAttribIndex:
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fixedAttribCount = 0;
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@ -162,7 +164,9 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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}
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break;
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case FixedAttribData0: case FixedAttribData1: case FixedAttribData2:
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case FixedAttribData0:
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case FixedAttribData1:
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case FixedAttribData2:
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fixedAttrBuff[fixedAttribCount++] = value;
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if (fixedAttribCount == 3) {
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@ -170,15 +174,15 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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vec4f attr;
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// These are stored in the reverse order anyone would expect them to be in
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attr.x() = f24::fromRaw(fixedAttrBuff[2] & 0xffffff);
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attr.y() = f24::fromRaw(((fixedAttrBuff[1] & 0xffff) << 8) | (fixedAttrBuff[2] >> 24));
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attr.z() = f24::fromRaw(((fixedAttrBuff[0] & 0xff) << 16) | (fixedAttrBuff[1] >> 16));
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attr.w() = f24::fromRaw(fixedAttrBuff[0] >> 8);
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attr[0] = f24::fromRaw(fixedAttrBuff[2] & 0xffffff);
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attr[1] = f24::fromRaw(((fixedAttrBuff[1] & 0xffff) << 8) | (fixedAttrBuff[2] >> 24));
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attr[2] = f24::fromRaw(((fixedAttrBuff[0] & 0xff) << 16) | (fixedAttrBuff[1] >> 16));
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attr[3] = f24::fromRaw(fixedAttrBuff[0] >> 8);
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// If the fixed attribute index is < 12, we're just writing to one of the fixed attributes
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if (fixedAttribIndex < 12) [[likely]] {
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shaderUnit.vs.fixedAttributes[fixedAttribIndex++] = attr;
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} else if (fixedAttribIndex == 15) { // Otherwise if it's 15, we're submitting an immediate mode vertex
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} else if (fixedAttribIndex == 15) { // Otherwise if it's 15, we're submitting an immediate mode vertex
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const uint totalAttrCount = (regs[PICA::InternalRegs::VertexShaderAttrNum] & 0xf) + 1;
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if (totalAttrCount <= immediateModeAttrIndex) {
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printf("Broken state in the immediate mode vertex submission pipeline. Failing silently\n");
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@ -199,13 +203,12 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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// If we've reached 3 verts, issue a draw call
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// Handle rendering depending on the primitive type
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if (immediateModeVertIndex == 3) {
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renderer.drawVertices(PICA::PrimType::TriangleList, immediateModeVertices);
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renderer->drawVertices(PICA::PrimType::TriangleList, immediateModeVertices);
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switch (primType) {
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// Triangle or geometry primitive. Draw a triangle and discard all vertices
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case 0: case 3:
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immediateModeVertIndex = 0;
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break;
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case 0:
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case 3: immediateModeVertIndex = 0; break;
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// Triangle strip. Draw triangle, discard first vertex and keep the last 2
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case 1:
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@ -223,54 +226,54 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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}
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}
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}
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} else { // Writing to fixed attributes 13 and 14 probably does nothing, but we'll see
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} else { // Writing to fixed attributes 13 and 14 probably does nothing, but we'll see
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log("Wrote to invalid fixed vertex attribute %d\n", fixedAttribIndex);
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}
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}
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break;
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case VertexShaderOpDescriptorIndex:
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shaderUnit.vs.setOpDescriptorIndex(value);
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break;
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case VertexShaderOpDescriptorIndex: shaderUnit.vs.setOpDescriptorIndex(value); break;
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case VertexShaderOpDescriptorData0: case VertexShaderOpDescriptorData1: case VertexShaderOpDescriptorData2:
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case VertexShaderOpDescriptorData3: case VertexShaderOpDescriptorData4: case VertexShaderOpDescriptorData5:
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case VertexShaderOpDescriptorData6: case VertexShaderOpDescriptorData7:
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shaderUnit.vs.uploadDescriptor(value);
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break;
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case VertexShaderOpDescriptorData0:
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case VertexShaderOpDescriptorData1:
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case VertexShaderOpDescriptorData2:
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case VertexShaderOpDescriptorData3:
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case VertexShaderOpDescriptorData4:
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case VertexShaderOpDescriptorData5:
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case VertexShaderOpDescriptorData6:
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case VertexShaderOpDescriptorData7: shaderUnit.vs.uploadDescriptor(value); break;
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case VertexBoolUniform:
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shaderUnit.vs.boolUniform = value & 0xffff;
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break;
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case VertexBoolUniform: shaderUnit.vs.boolUniform = value & 0xffff; break;
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case VertexIntUniform0: case VertexIntUniform1: case VertexIntUniform2: case VertexIntUniform3:
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shaderUnit.vs.uploadIntUniform(index - VertexIntUniform0, value);
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break;
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case VertexIntUniform0:
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case VertexIntUniform1:
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case VertexIntUniform2:
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case VertexIntUniform3: shaderUnit.vs.uploadIntUniform(index - VertexIntUniform0, value); break;
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case VertexShaderData0: case VertexShaderData1: case VertexShaderData2: case VertexShaderData3:
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case VertexShaderData4: case VertexShaderData5: case VertexShaderData6: case VertexShaderData7:
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shaderUnit.vs.uploadWord(value);
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break;
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case VertexShaderData0:
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case VertexShaderData1:
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case VertexShaderData2:
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case VertexShaderData3:
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case VertexShaderData4:
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case VertexShaderData5:
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case VertexShaderData6:
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case VertexShaderData7: shaderUnit.vs.uploadWord(value); break;
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case VertexShaderEntrypoint:
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shaderUnit.vs.entrypoint = value & 0xffff;
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break;
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case VertexShaderEntrypoint: shaderUnit.vs.entrypoint = value & 0xffff; break;
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case VertexShaderTransferEnd:
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if (value != 0) shaderUnit.vs.finalize();
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break;
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case VertexShaderTransferIndex:
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shaderUnit.vs.setBufferIndex(value);
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break;
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case VertexShaderTransferIndex: shaderUnit.vs.setBufferIndex(value); break;
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// Command lists can write to the command processor registers and change the command list stream
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// Several games are known to do this, including New Super Mario Bros 2 and Super Mario 3D Land
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case CmdBufTrigger0:
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case CmdBufTrigger1: {
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if (value != 0) { // A non-zero value triggers command list processing
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int bufferIndex = index - CmdBufTrigger0; // Index of the command buffer to execute (0 or 1)
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if (value != 0) { // A non-zero value triggers command list processing
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int bufferIndex = index - CmdBufTrigger0; // Index of the command buffer to execute (0 or 1)
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u32 addr = (regs[CmdBufAddr0 + bufferIndex] & 0xfffffff) << 3;
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u32 size = (regs[CmdBufSize0 + bufferIndex] & 0xfffff) << 3;
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@ -285,15 +288,13 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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default:
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// Vertex attribute registers
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if (index >= AttribInfoStart && index <= AttribInfoEnd) {
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uint attributeIndex = (index - AttribInfoStart) / 3; // Which attribute are we writing to
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uint reg = (index - AttribInfoStart) % 3; // Which of this attribute's registers are we writing to?
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uint attributeIndex = (index - AttribInfoStart) / 3; // Which attribute are we writing to
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uint reg = (index - AttribInfoStart) % 3; // Which of this attribute's registers are we writing to?
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auto& attr = attributeInfo[attributeIndex];
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switch (reg) {
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case 0: attr.offset = value & 0xfffffff; break; // Attribute offset
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case 1:
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attr.config1 = value;
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break;
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case 0: attr.offset = value & 0xfffffff; break; // Attribute offset
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case 1: attr.config1 = value; break;
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case 2:
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attr.config2 = value;
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attr.size = getBits<16, 8>(value);
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@ -339,13 +340,13 @@ void GPU::startCommandList(u32 addr, u32 size) {
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u32 id = header & 0xffff;
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u32 paramMaskIndex = getBits<16, 4>(header);
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u32 paramCount = getBits<20, 8>(header); // Number of additional parameters
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u32 paramCount = getBits<20, 8>(header); // Number of additional parameters
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// Bit 31 tells us whether this command is going to write to multiple sequential registers (if the bit is 1)
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// Or if all written values will go to the same register (If the bit is 0). It's essentially the value that
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// gets added to the "id" field after each register write
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bool consecutiveWritingMode = (header >> 31) != 0;
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u32 mask = maskLUT[paramMaskIndex]; // Actual parameter mask
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u32 mask = maskLUT[paramMaskIndex]; // Actual parameter mask
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// Increment the ID by 1 after each write if we're in consecutive mode, or 0 otherwise
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u32 idIncrement = (consecutiveWritingMode) ? 1 : 0;
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@ -1,6 +1,7 @@
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#include "PICA/shader.hpp"
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#include <cmath>
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#include "PICA/shader.hpp"
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using namespace Helpers;
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void PICAShader::run() {
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@ -11,20 +12,19 @@ void PICAShader::run() {
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while (true) {
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const u32 instruction = loadedShader[pc++];
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const u32 opcode = instruction >> 26; // Top 6 bits are the opcode
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const u32 opcode = instruction >> 26; // Top 6 bits are the opcode
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switch (opcode) {
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case ShaderOpcodes::ADD: add(instruction); break;
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case ShaderOpcodes::CALL: call(instruction); break;
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case ShaderOpcodes::CALLC: callc(instruction); break;
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case ShaderOpcodes::CALLU: callu(instruction); break;
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case ShaderOpcodes::CMP1: case ShaderOpcodes::CMP2:
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cmp(instruction);
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break;
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case ShaderOpcodes::CMP1:
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case ShaderOpcodes::CMP2: cmp(instruction); break;
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case ShaderOpcodes::DP3: dp3(instruction); break;
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case ShaderOpcodes::DP4: dp4(instruction); break;
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case ShaderOpcodes::DPHI: dphi(instruction); break;
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case ShaderOpcodes::END: return; // Stop running shader
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case ShaderOpcodes::END: return; // Stop running shader
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case ShaderOpcodes::EX2: ex2(instruction); break;
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case ShaderOpcodes::FLR: flr(instruction); break;
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case ShaderOpcodes::IFC: ifc(instruction); break;
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@ -38,31 +38,41 @@ void PICAShader::run() {
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case ShaderOpcodes::MOV: mov(instruction); break;
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case ShaderOpcodes::MOVA: mova(instruction); break;
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case ShaderOpcodes::MUL: mul(instruction); break;
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case ShaderOpcodes::NOP: break; // Do nothing
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case ShaderOpcodes::NOP: break; // Do nothing
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case ShaderOpcodes::RCP: rcp(instruction); break;
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case ShaderOpcodes::RSQ: rsq(instruction); break;
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case ShaderOpcodes::SGEI: sgei(instruction); break;
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case ShaderOpcodes::SLT: slt(instruction); break;
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case ShaderOpcodes::SLTI: slti(instruction); break;
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case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
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madi(instruction);
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break;
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case 0x30:
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case 0x31:
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case 0x32:
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case 0x33:
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case 0x34:
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case 0x35:
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case 0x36:
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case 0x37: madi(instruction); break;
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case 0x38: case 0x39: case 0x3A: case 0x3B: case 0x3C: case 0x3D: case 0x3E: case 0x3F:
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mad(instruction);
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break;
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case 0x38:
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case 0x39:
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case 0x3A:
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case 0x3B:
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case 0x3C:
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case 0x3D:
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case 0x3E:
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case 0x3F: mad(instruction); break;
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default:Helpers::panic("Unimplemented PICA instruction %08X (Opcode = %02X)", instruction, opcode);
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default: Helpers::panic("Unimplemented PICA instruction %08X (Opcode = %02X)", instruction, opcode);
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}
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// Handle control flow statements. The ordering is important as the priority goes: LOOP > IF > CALL
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// Handle loop
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if (loopIndex != 0) {
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auto& loop = loopInfo[loopIndex - 1];
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if (pc == loop.endingPC) { // Check if the loop needs to start over
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if (pc == loop.endingPC) { // Check if the loop needs to start over
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loop.iterations -= 1;
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if (loop.iterations == 0) // If the loop ended, go one level down on the loop stack
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if (loop.iterations == 0) // If the loop ended, go one level down on the loop stack
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loopIndex -= 1;
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loopCounter += loop.increment;
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@ -73,7 +83,7 @@ void PICAShader::run() {
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// Handle ifs
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if (ifIndex != 0) {
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auto& info = conditionalInfo[ifIndex - 1];
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if (pc == info.endingPC) { // Check if the IF block ended
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if (pc == info.endingPC) { // Check if the IF block ended
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pc = info.newPC;
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ifIndex -= 1;
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}
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@ -82,7 +92,7 @@ void PICAShader::run() {
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// Handle calls
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if (callIndex != 0) {
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auto& info = callInfo[callIndex - 1];
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if (pc == info.endingPC) { // Check if the CALL block ended
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if (pc == info.endingPC) { // Check if the CALL block ended
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pc = info.returnPC;
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callIndex -= 1;
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}
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@ -92,15 +102,15 @@ void PICAShader::run() {
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// Calculate the actual source value using an instruction's source field and it's respective index value
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// The index value is used to apply relative addressing when index != 0 by adding one of the 3 addr registers to the
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// source field, but only with the original source field is pointing at a vector uniform register
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// source field, but only with the original source field is pointing at a vector uniform register
|
||||
u8 PICAShader::getIndexedSource(u32 source, u32 index) {
|
||||
if (source < 0x20) // No offset is applied if the source isn't pointing to a vector uniform reg
|
||||
if (source < 0x20) // No offset is applied if the source isn't pointing to a vector uniform reg
|
||||
return source;
|
||||
|
||||
switch (index) {
|
||||
case 0: [[likely]] return u8(source); // No offset applied
|
||||
case 1: return u8(source + addrRegister.x());
|
||||
case 2: return u8(source + addrRegister.y());
|
||||
case 0: [[likely]] return u8(source); // No offset applied
|
||||
case 1: return u8(source + addrRegister[0]);
|
||||
case 2: return u8(source + addrRegister[1]);
|
||||
case 3: return u8(source + loopCounter);
|
||||
}
|
||||
|
||||
|
|
@ -117,7 +127,7 @@ PICAShader::vec4f PICAShader::getSource(u32 source) {
|
|||
return floatUniforms[source - 0x20];
|
||||
else {
|
||||
Helpers::warn("[PICA] Unimplemented source value: %X\n", source);
|
||||
return vec4f({ f24::zero(), f24::zero(), f24::zero(), f24::zero() });
|
||||
return vec4f({f24::zero(), f24::zero(), f24::zero(), f24::zero()});
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -136,13 +146,13 @@ bool PICAShader::isCondTrue(u32 instruction) {
|
|||
bool refX = (getBit<25>(instruction)) != 0;
|
||||
|
||||
switch (condition) {
|
||||
case 0: // Either cmp register matches
|
||||
case 0: // Either cmp register matches
|
||||
return cmpRegister[0] == refX || cmpRegister[1] == refY;
|
||||
case 1: // Both cmp registers match
|
||||
case 1: // Both cmp registers match
|
||||
return cmpRegister[0] == refX && cmpRegister[1] == refY;
|
||||
case 2: // At least cmp.x matches
|
||||
case 2: // At least cmp.x matches
|
||||
return cmpRegister[0] == refX;
|
||||
default: // At least cmp.y matches
|
||||
default: // At least cmp.y matches
|
||||
return cmpRegister[1] == refY;
|
||||
}
|
||||
}
|
||||
|
|
@ -150,7 +160,7 @@ bool PICAShader::isCondTrue(u32 instruction) {
|
|||
void PICAShader::add(u32 instruction) {
|
||||
const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
|
||||
u32 src1 = getBits<12, 7>(instruction);
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 idx = getBits<19, 2>(instruction);
|
||||
const u32 dest = getBits<21, 5>(instruction);
|
||||
|
||||
|
|
@ -171,7 +181,7 @@ void PICAShader::add(u32 instruction) {
|
|||
void PICAShader::mul(u32 instruction) {
|
||||
const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
|
||||
u32 src1 = getBits<12, 7>(instruction);
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 idx = getBits<19, 2>(instruction);
|
||||
const u32 dest = getBits<21, 5>(instruction);
|
||||
|
||||
|
|
@ -210,7 +220,7 @@ void PICAShader::flr(u32 instruction) {
|
|||
void PICAShader::max(u32 instruction) {
|
||||
const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
|
||||
const u32 src1 = getBits<12, 7>(instruction);
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 idx = getBits<19, 2>(instruction);
|
||||
const u32 dest = getBits<21, 5>(instruction);
|
||||
|
||||
|
|
@ -232,7 +242,7 @@ void PICAShader::max(u32 instruction) {
|
|||
void PICAShader::min(u32 instruction) {
|
||||
const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
|
||||
const u32 src1 = getBits<12, 7>(instruction);
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 idx = getBits<19, 2>(instruction);
|
||||
const u32 dest = getBits<21, 5>(instruction);
|
||||
|
||||
|
|
@ -278,16 +288,16 @@ void PICAShader::mova(u32 instruction) {
|
|||
vec4f srcVector = getSourceSwizzled<1>(src, operandDescriptor);
|
||||
|
||||
u32 componentMask = operandDescriptor & 0xf;
|
||||
if (componentMask & 0b1000) // x component
|
||||
addrRegister.x() = static_cast<s32>(srcVector.x().toFloat32());
|
||||
if (componentMask & 0b0100) // y component
|
||||
addrRegister.y() = static_cast<s32>(srcVector.y().toFloat32());
|
||||
if (componentMask & 0b1000) // x component
|
||||
addrRegister[0] = static_cast<s32>(srcVector[0].toFloat32());
|
||||
if (componentMask & 0b0100) // y component
|
||||
addrRegister[1] = static_cast<s32>(srcVector[1].toFloat32());
|
||||
}
|
||||
|
||||
void PICAShader::dp3(u32 instruction) {
|
||||
const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
|
||||
u32 src1 = getBits<12, 7>(instruction);
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 idx = getBits<19, 2>(instruction);
|
||||
const u32 dest = getBits<21, 5>(instruction);
|
||||
|
||||
|
|
@ -309,7 +319,7 @@ void PICAShader::dp3(u32 instruction) {
|
|||
void PICAShader::dp4(u32 instruction) {
|
||||
const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
|
||||
u32 src1 = getBits<12, 7>(instruction);
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 idx = getBits<19, 2>(instruction);
|
||||
const u32 dest = getBits<21, 5>(instruction);
|
||||
|
||||
|
|
@ -480,7 +490,7 @@ void PICAShader::madi(u32 instruction) {
|
|||
void PICAShader::slt(u32 instruction) {
|
||||
const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
|
||||
u32 src1 = getBits<12, 7>(instruction);
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 idx = getBits<19, 2>(instruction);
|
||||
const u32 dest = getBits<21, 5>(instruction);
|
||||
|
||||
|
|
@ -542,11 +552,11 @@ void PICAShader::slti(u32 instruction) {
|
|||
void PICAShader::cmp(u32 instruction) {
|
||||
const u32 operandDescriptor = operandDescriptors[instruction & 0x7f];
|
||||
const u32 src1 = getBits<12, 7>(instruction);
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 src2 = getBits<7, 5>(instruction); // src2 coming first because PICA moment
|
||||
const u32 idx = getBits<19, 2>(instruction);
|
||||
const u32 cmpY = getBits<21, 3>(instruction);
|
||||
const u32 cmpX = getBits<24, 3>(instruction);
|
||||
const u32 cmpOperations[2] = { cmpX, cmpY };
|
||||
const u32 cmpOperations[2] = {cmpX, cmpY};
|
||||
|
||||
if (idx) Helpers::panic("[PICA] CMP: idx != 0");
|
||||
vec4f srcVec1 = getSourceSwizzled<1>(src1, operandDescriptor);
|
||||
|
|
@ -554,33 +564,31 @@ void PICAShader::cmp(u32 instruction) {
|
|||
|
||||
for (int i = 0; i < 2; i++) {
|
||||
switch (cmpOperations[i]) {
|
||||
case 0: // Equal
|
||||
case 0: // Equal
|
||||
cmpRegister[i] = srcVec1[i] == srcVec2[i];
|
||||
break;
|
||||
|
||||
case 1: // Not equal
|
||||
case 1: // Not equal
|
||||
cmpRegister[i] = srcVec1[i] != srcVec2[i];
|
||||
break;
|
||||
|
||||
case 2: // Less than
|
||||
case 2: // Less than
|
||||
cmpRegister[i] = srcVec1[i] < srcVec2[i];
|
||||
break;
|
||||
|
||||
case 3: // Less than or equal
|
||||
case 3: // Less than or equal
|
||||
cmpRegister[i] = srcVec1[i] <= srcVec2[i];
|
||||
break;
|
||||
|
||||
case 4: // Greater than
|
||||
case 4: // Greater than
|
||||
cmpRegister[i] = srcVec1[i] > srcVec2[i];
|
||||
break;
|
||||
|
||||
case 5: // Greater than or equal
|
||||
case 5: // Greater than or equal
|
||||
cmpRegister[i] = srcVec1[i] >= srcVec2[i];
|
||||
break;
|
||||
|
||||
default:
|
||||
cmpRegister[i] = true;
|
||||
break;
|
||||
default: cmpRegister[i] = true; break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -604,7 +612,7 @@ void PICAShader::ifc(u32 instruction) {
|
|||
|
||||
void PICAShader::ifu(u32 instruction) {
|
||||
const u32 dest = getBits<10, 12>(instruction);
|
||||
const u32 bit = getBits<22, 4>(instruction); // Bit of the bool uniform to check
|
||||
const u32 bit = getBits<22, 4>(instruction); // Bit of the bool uniform to check
|
||||
|
||||
if (boolUniform & (1 << bit)) {
|
||||
if (ifIndex >= 8) [[unlikely]]
|
||||
|
|
@ -615,8 +623,7 @@ void PICAShader::ifu(u32 instruction) {
|
|||
auto& block = conditionalInfo[ifIndex++];
|
||||
block.endingPC = dest;
|
||||
block.newPC = dest + num;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
pc = dest;
|
||||
}
|
||||
}
|
||||
|
|
@ -637,12 +644,12 @@ void PICAShader::call(u32 instruction) {
|
|||
|
||||
void PICAShader::callc(u32 instruction) {
|
||||
if (isCondTrue(instruction)) {
|
||||
call(instruction); // Pls inline
|
||||
call(instruction); // Pls inline
|
||||
}
|
||||
}
|
||||
|
||||
void PICAShader::callu(u32 instruction) {
|
||||
const u32 bit = getBits<22, 4>(instruction); // Bit of the bool uniform to check
|
||||
const u32 bit = getBits<22, 4>(instruction); // Bit of the bool uniform to check
|
||||
|
||||
if (boolUniform & (1 << bit)) {
|
||||
if (callIndex >= 4) [[unlikely]]
|
||||
|
|
@ -664,26 +671,25 @@ void PICAShader::loop(u32 instruction) {
|
|||
Helpers::panic("[PICA] Overflowed loop stack");
|
||||
|
||||
u32 dest = getBits<10, 12>(instruction);
|
||||
auto& uniform = intUniforms[getBits<22, 2>(instruction)]; // The uniform we'll get loop info from
|
||||
loopCounter = uniform.y();
|
||||
auto& uniform = intUniforms[getBits<22, 2>(instruction)]; // The uniform we'll get loop info from
|
||||
loopCounter = uniform[1];
|
||||
auto& loop = loopInfo[loopIndex++];
|
||||
|
||||
loop.startingPC = pc;
|
||||
loop.endingPC = dest + 1; // Loop is inclusive so we need + 1 here
|
||||
loop.iterations = uniform.x() + 1;
|
||||
loop.increment = uniform.z();
|
||||
loop.endingPC = dest + 1; // Loop is inclusive so we need + 1 here
|
||||
loop.iterations = uniform[0] + 1;
|
||||
loop.increment = uniform[2];
|
||||
}
|
||||
|
||||
void PICAShader::jmpc(u32 instruction) {
|
||||
if (isCondTrue(instruction))
|
||||
pc = getBits<10, 12>(instruction);
|
||||
if (isCondTrue(instruction)) pc = getBits<10, 12>(instruction);
|
||||
}
|
||||
|
||||
void PICAShader::jmpu(u32 instruction) {
|
||||
const u32 test = (instruction & 1) ^ 1; // If the LSB is 0 we want to compare to true, otherwise compare to false
|
||||
const u32 test = (instruction & 1) ^ 1; // If the LSB is 0 we want to compare to true, otherwise compare to false
|
||||
const u32 dest = getBits<10, 12>(instruction);
|
||||
const u32 bit = getBits<22, 4>(instruction); // Bit of the bool uniform to check
|
||||
const u32 bit = getBits<22, 4>(instruction); // Bit of the bool uniform to check
|
||||
|
||||
if (((boolUniform >> bit) & 1) == test) // Jump if the bool uniform is the value we want
|
||||
if (((boolUniform >> bit) & 1) == test) // Jump if the bool uniform is the value we want
|
||||
pc = dest;
|
||||
}
|
||||
|
|
@ -1,4 +1,5 @@
|
|||
#include "PICA/shader_unit.hpp"
|
||||
|
||||
#include "cityhash.hpp"
|
||||
|
||||
void ShaderUnit::reset() {
|
||||
|
|
@ -18,18 +19,18 @@ void PICAShader::reset() {
|
|||
opDescriptorIndex = 0;
|
||||
f32UniformTransfer = false;
|
||||
|
||||
const vec4f zero = vec4f({ f24::zero(), f24::zero(), f24::zero(), f24::zero() });
|
||||
const vec4f zero = vec4f({f24::zero(), f24::zero(), f24::zero(), f24::zero()});
|
||||
inputs.fill(zero);
|
||||
floatUniforms.fill(zero);
|
||||
outputs.fill(zero);
|
||||
tempRegisters.fill(zero);
|
||||
|
||||
for (auto& e : intUniforms) {
|
||||
e.x() = e.y() = e.z() = e.w() = 0;
|
||||
e[0] = e[1] = e[2] = e[3] = 0;
|
||||
}
|
||||
|
||||
addrRegister.x() = 0;
|
||||
addrRegister.y() = 0;
|
||||
addrRegister[0] = 0;
|
||||
addrRegister[1] = 0;
|
||||
loopCounter = 0;
|
||||
|
||||
codeHashDirty = true;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue