mirror of
https://github.com/wheremyfoodat/Panda3DS.git
synced 2025-04-20 12:39:13 +12:00
Remove OpenGL-specific vector-types
Removes dependency on the OpenGL header and rendering backen for its `OpenGL::Vector` type in favor of a more standard array.
This commit is contained in:
Wunkolo
parent
2a1683ba62
commit
9e32b6d4bf
5 changed files with 221 additions and 224 deletions
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@ -1,11 +1,12 @@
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#include "PICA/gpu.hpp"
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#include "PICA/regs.hpp"
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#include "PICA/gpu.hpp"
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using namespace Floats;
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using namespace Helpers;
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u32 GPU::readReg(u32 address) {
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if (address >= 0x1EF01000 && address < 0x1EF01C00) { // Internal registers
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if (address >= 0x1EF01000 && address < 0x1EF01C00) { // Internal registers
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const u32 index = (address - 0x1EF01000) / sizeof(u32);
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return readInternalReg(index);
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} else {
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@ -15,7 +16,7 @@ u32 GPU::readReg(u32 address) {
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}
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void GPU::writeReg(u32 address, u32 value) {
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if (address >= 0x1EF01000 && address < 0x1EF01C00) { // Internal registers
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if (address >= 0x1EF01000 && address < 0x1EF01C00) { // Internal registers
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const u32 index = (address - 0x1EF01000) / sizeof(u32);
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writeInternalReg(index, value, 0xffffffff);
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} else {
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@ -59,7 +60,7 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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}
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u32 currentValue = regs[index];
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u32 newValue = (currentValue & ~mask) | (value & mask); // Only overwrite the bits specified by "mask"
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u32 newValue = (currentValue & ~mask) | (value & mask); // Only overwrite the bits specified by "mask"
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regs[index] = newValue;
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// TODO: Figure out if things like the shader index use the unmasked value or the masked one
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@ -74,38 +75,38 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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break;
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case AttribFormatHigh:
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totalAttribCount = (value >> 28) + 1; // Total number of vertex attributes
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fixedAttribMask = getBits<16, 12>(value); // Determines which vertex attributes are fixed for all vertices
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totalAttribCount = (value >> 28) + 1; // Total number of vertex attributes
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fixedAttribMask = getBits<16, 12>(value); // Determines which vertex attributes are fixed for all vertices
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break;
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case ColourBufferLoc: {
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u32 loc = (value & 0x0fffffff) << 3;
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renderer.setColourBufferLoc(loc);
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renderer->setColourBufferLoc(loc);
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break;
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};
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case ColourBufferFormat: {
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u32 format = getBits<16, 3>(value);
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renderer.setColourFormat(static_cast<PICA::ColorFmt>(format));
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renderer->setColourFormat(static_cast<PICA::ColorFmt>(format));
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break;
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}
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case DepthBufferLoc: {
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u32 loc = (value & 0x0fffffff) << 3;
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renderer.setDepthBufferLoc(loc);
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renderer->setDepthBufferLoc(loc);
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break;
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}
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case DepthBufferFormat: {
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u32 format = value & 0x3;
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renderer.setDepthFormat(static_cast<PICA::DepthFmt>(format));
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renderer->setDepthFormat(static_cast<PICA::DepthFmt>(format));
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break;
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}
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case FramebufferSize: {
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const u32 width = value & 0x7ff;
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const u32 height = getBits<12, 10>(value) + 1;
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renderer.setFBSize(width, height);
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renderer->setFBSize(width, height);
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break;
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}
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@ -116,7 +117,7 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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case LightingLUTData4:
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case LightingLUTData5:
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case LightingLUTData6:
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case LightingLUTData7:{
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case LightingLUTData7: {
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const uint32_t index = regs[LightingLUTIndex]; // Get full LUT index register
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const uint32_t lutID = getBits<8, 5>(index); // Get which LUT we're actually writing to
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uint32_t lutIndex = getBits<0, 8>(index); // And get the index inside the LUT we're writing to
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@ -133,15 +134,16 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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break;
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}
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case VertexFloatUniformIndex:
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shaderUnit.vs.setFloatUniformIndex(value);
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break;
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case VertexFloatUniformIndex: shaderUnit.vs.setFloatUniformIndex(value); break;
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case VertexFloatUniformData0: case VertexFloatUniformData1: case VertexFloatUniformData2:
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case VertexFloatUniformData3: case VertexFloatUniformData4: case VertexFloatUniformData5:
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case VertexFloatUniformData6: case VertexFloatUniformData7:
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shaderUnit.vs.uploadFloatUniform(value);
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break;
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case VertexFloatUniformData0:
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case VertexFloatUniformData1:
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case VertexFloatUniformData2:
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case VertexFloatUniformData3:
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case VertexFloatUniformData4:
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case VertexFloatUniformData5:
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case VertexFloatUniformData6:
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case VertexFloatUniformData7: shaderUnit.vs.uploadFloatUniform(value); break;
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case FixedAttribIndex:
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fixedAttribCount = 0;
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@ -162,7 +164,9 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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}
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break;
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case FixedAttribData0: case FixedAttribData1: case FixedAttribData2:
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case FixedAttribData0:
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case FixedAttribData1:
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case FixedAttribData2:
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fixedAttrBuff[fixedAttribCount++] = value;
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if (fixedAttribCount == 3) {
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@ -170,15 +174,15 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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vec4f attr;
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// These are stored in the reverse order anyone would expect them to be in
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attr.x() = f24::fromRaw(fixedAttrBuff[2] & 0xffffff);
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attr.y() = f24::fromRaw(((fixedAttrBuff[1] & 0xffff) << 8) | (fixedAttrBuff[2] >> 24));
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attr.z() = f24::fromRaw(((fixedAttrBuff[0] & 0xff) << 16) | (fixedAttrBuff[1] >> 16));
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attr.w() = f24::fromRaw(fixedAttrBuff[0] >> 8);
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attr[0] = f24::fromRaw(fixedAttrBuff[2] & 0xffffff);
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attr[1] = f24::fromRaw(((fixedAttrBuff[1] & 0xffff) << 8) | (fixedAttrBuff[2] >> 24));
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attr[2] = f24::fromRaw(((fixedAttrBuff[0] & 0xff) << 16) | (fixedAttrBuff[1] >> 16));
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attr[3] = f24::fromRaw(fixedAttrBuff[0] >> 8);
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// If the fixed attribute index is < 12, we're just writing to one of the fixed attributes
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if (fixedAttribIndex < 12) [[likely]] {
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shaderUnit.vs.fixedAttributes[fixedAttribIndex++] = attr;
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} else if (fixedAttribIndex == 15) { // Otherwise if it's 15, we're submitting an immediate mode vertex
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} else if (fixedAttribIndex == 15) { // Otherwise if it's 15, we're submitting an immediate mode vertex
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const uint totalAttrCount = (regs[PICA::InternalRegs::VertexShaderAttrNum] & 0xf) + 1;
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if (totalAttrCount <= immediateModeAttrIndex) {
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printf("Broken state in the immediate mode vertex submission pipeline. Failing silently\n");
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@ -199,13 +203,12 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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// If we've reached 3 verts, issue a draw call
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// Handle rendering depending on the primitive type
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if (immediateModeVertIndex == 3) {
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renderer.drawVertices(PICA::PrimType::TriangleList, immediateModeVertices);
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renderer->drawVertices(PICA::PrimType::TriangleList, immediateModeVertices);
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switch (primType) {
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// Triangle or geometry primitive. Draw a triangle and discard all vertices
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case 0: case 3:
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immediateModeVertIndex = 0;
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break;
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case 0:
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case 3: immediateModeVertIndex = 0; break;
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// Triangle strip. Draw triangle, discard first vertex and keep the last 2
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case 1:
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@ -223,54 +226,54 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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}
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}
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}
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} else { // Writing to fixed attributes 13 and 14 probably does nothing, but we'll see
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} else { // Writing to fixed attributes 13 and 14 probably does nothing, but we'll see
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log("Wrote to invalid fixed vertex attribute %d\n", fixedAttribIndex);
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}
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}
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break;
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case VertexShaderOpDescriptorIndex:
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shaderUnit.vs.setOpDescriptorIndex(value);
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break;
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case VertexShaderOpDescriptorIndex: shaderUnit.vs.setOpDescriptorIndex(value); break;
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case VertexShaderOpDescriptorData0: case VertexShaderOpDescriptorData1: case VertexShaderOpDescriptorData2:
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case VertexShaderOpDescriptorData3: case VertexShaderOpDescriptorData4: case VertexShaderOpDescriptorData5:
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case VertexShaderOpDescriptorData6: case VertexShaderOpDescriptorData7:
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shaderUnit.vs.uploadDescriptor(value);
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break;
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case VertexShaderOpDescriptorData0:
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case VertexShaderOpDescriptorData1:
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case VertexShaderOpDescriptorData2:
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case VertexShaderOpDescriptorData3:
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case VertexShaderOpDescriptorData4:
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case VertexShaderOpDescriptorData5:
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case VertexShaderOpDescriptorData6:
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case VertexShaderOpDescriptorData7: shaderUnit.vs.uploadDescriptor(value); break;
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case VertexBoolUniform:
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shaderUnit.vs.boolUniform = value & 0xffff;
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break;
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case VertexBoolUniform: shaderUnit.vs.boolUniform = value & 0xffff; break;
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case VertexIntUniform0: case VertexIntUniform1: case VertexIntUniform2: case VertexIntUniform3:
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shaderUnit.vs.uploadIntUniform(index - VertexIntUniform0, value);
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break;
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case VertexIntUniform0:
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case VertexIntUniform1:
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case VertexIntUniform2:
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case VertexIntUniform3: shaderUnit.vs.uploadIntUniform(index - VertexIntUniform0, value); break;
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case VertexShaderData0: case VertexShaderData1: case VertexShaderData2: case VertexShaderData3:
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case VertexShaderData4: case VertexShaderData5: case VertexShaderData6: case VertexShaderData7:
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shaderUnit.vs.uploadWord(value);
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break;
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case VertexShaderData0:
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case VertexShaderData1:
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case VertexShaderData2:
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case VertexShaderData3:
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case VertexShaderData4:
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case VertexShaderData5:
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case VertexShaderData6:
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case VertexShaderData7: shaderUnit.vs.uploadWord(value); break;
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case VertexShaderEntrypoint:
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shaderUnit.vs.entrypoint = value & 0xffff;
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break;
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case VertexShaderEntrypoint: shaderUnit.vs.entrypoint = value & 0xffff; break;
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case VertexShaderTransferEnd:
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if (value != 0) shaderUnit.vs.finalize();
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break;
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case VertexShaderTransferIndex:
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shaderUnit.vs.setBufferIndex(value);
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break;
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case VertexShaderTransferIndex: shaderUnit.vs.setBufferIndex(value); break;
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// Command lists can write to the command processor registers and change the command list stream
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// Several games are known to do this, including New Super Mario Bros 2 and Super Mario 3D Land
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case CmdBufTrigger0:
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case CmdBufTrigger1: {
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if (value != 0) { // A non-zero value triggers command list processing
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int bufferIndex = index - CmdBufTrigger0; // Index of the command buffer to execute (0 or 1)
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if (value != 0) { // A non-zero value triggers command list processing
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int bufferIndex = index - CmdBufTrigger0; // Index of the command buffer to execute (0 or 1)
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u32 addr = (regs[CmdBufAddr0 + bufferIndex] & 0xfffffff) << 3;
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u32 size = (regs[CmdBufSize0 + bufferIndex] & 0xfffff) << 3;
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@ -285,15 +288,13 @@ void GPU::writeInternalReg(u32 index, u32 value, u32 mask) {
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default:
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// Vertex attribute registers
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if (index >= AttribInfoStart && index <= AttribInfoEnd) {
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uint attributeIndex = (index - AttribInfoStart) / 3; // Which attribute are we writing to
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uint reg = (index - AttribInfoStart) % 3; // Which of this attribute's registers are we writing to?
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uint attributeIndex = (index - AttribInfoStart) / 3; // Which attribute are we writing to
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uint reg = (index - AttribInfoStart) % 3; // Which of this attribute's registers are we writing to?
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auto& attr = attributeInfo[attributeIndex];
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switch (reg) {
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case 0: attr.offset = value & 0xfffffff; break; // Attribute offset
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case 1:
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attr.config1 = value;
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break;
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case 0: attr.offset = value & 0xfffffff; break; // Attribute offset
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case 1: attr.config1 = value; break;
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case 2:
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attr.config2 = value;
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attr.size = getBits<16, 8>(value);
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@ -339,13 +340,13 @@ void GPU::startCommandList(u32 addr, u32 size) {
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u32 id = header & 0xffff;
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u32 paramMaskIndex = getBits<16, 4>(header);
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u32 paramCount = getBits<20, 8>(header); // Number of additional parameters
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u32 paramCount = getBits<20, 8>(header); // Number of additional parameters
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// Bit 31 tells us whether this command is going to write to multiple sequential registers (if the bit is 1)
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// Or if all written values will go to the same register (If the bit is 0). It's essentially the value that
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// gets added to the "id" field after each register write
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bool consecutiveWritingMode = (header >> 31) != 0;
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u32 mask = maskLUT[paramMaskIndex]; // Actual parameter mask
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u32 mask = maskLUT[paramMaskIndex]; // Actual parameter mask
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// Increment the ID by 1 after each write if we're in consecutive mode, or 0 otherwise
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u32 idIncrement = (consecutiveWritingMode) ? 1 : 0;
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